000 00440nam a22001697a 4500
999 _c24595
_d24595
003 AUCL
005 20200324144401.0
008 200324b ||||| |||| 00| 0 eng d
020 _a9780534551612
040 _cAUKP
082 _a621.395 LEE
100 _aLee, Sunggu
245 _aAdvanced Digital Logic Design Using Verilog, State Machines, and Synthesis for FPGA's
260 _bThomson
_c2006
300 _a462 p.
942 _2ddc
_cBK