Verilog hdl (Record no. 8355)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 01778nam a2200265 a 4500 |
| 001 - CONTROL NUMBER | |
| control field | ASIN0132599708 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | OSt |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20190522132742.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 150513s2003 xxu eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 0132599708 (paperback) |
| Terms of availability | $115.00 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9780132599702 (paperback) |
| 028 42 - PUBLISHER OR DISTRIBUTOR NUMBER | |
| Publisher or distributor number | 9780132599702 |
| Source | Prentice Hall |
| 037 ## - SOURCE OF ACQUISITION | |
| Terms of availability | 325.00 PKR |
| 040 ## - CATALOGING SOURCE | |
| Transcribing agency | AUI |
| 100 1# - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Palnitkar, Samir. |
| 9 (RLIN) | 12673 |
| 245 10 - TITLE STATEMENT | |
| Title | Verilog hdl |
| Statement of responsibility, etc. | Samir Palnitkar. |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 2nd ed. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | New Delhi |
| Name of publisher, distributor, etc. | Prentice Hall, |
| Date of publication, distribution, etc. | 2003. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 450 p. |
| Dimensions | 24 cm. |
| 490 1# - SERIES STATEMENT | |
| Series statement | Paperback) (2nd edition. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc. | Appropriate for all courses in digital IC or system design using the Verilog Hardware Description Language (HDL). Fully updated for the latest versions of Verilog HDL, this complete reference progresses logically from the most fundamental Verilog concepts to today's most advanced digital design techniques. Written for both experienced students and newcomers, it offers broad coverage of Verilog HDL from a practical design perspective. One step at a time, Samir Palnitkar introduces students to gate, dataflow (RTL), behavioral, and switch level modeling; presents the Programming Language Interface (PLI); describes leading logic synthesis methodologies; explains timing and delay simulation; and introduces many other essential techniques for creating tomorrows complex digital designs. Palnitkar offers a wealth of proven Verilog HDL modeling tips, and more than 300 fully-updated illustrations, examples, and exercises. Each chapter contains detailed learning objectives and convenient summaries. |
| 830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE | |
| Uniform title | Paperback) (2nd edition. |
| 9 (RLIN) | 12674 |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Materials specified | Amazon.com |
| Uniform Resource Identifier | <a href="http://www.amazon.com/exec/obidos/ASIN/0132599708/chopaconline-20">http://www.amazon.com/exec/obidos/ASIN/0132599708/chopaconline-20</a> |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | Dewey Decimal Classification |
| Koha item type | Book |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Home library | Current library | Date acquired | Source of acquisition | Inventory number | Total Checkouts | Full call number | Barcode | Date last seen | Price effective from | Koha item type | Public note |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Written off { Not Available } | Dewey Decimal Classification | Air University Central Library Islamabad | Air University Central Library Islamabad | 05/13/2015 | Allied Book Company | 1590 | 621.392 PAL | P4405 | 01/11/2017 | 01/11/2017 | Book | Write of 2016 (IBD/AU/231/10/1/LIB) |