Writing testbenches : (Record no. 19352)
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000 -LEADER | |
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fixed length control field | 01763nam a2200229 a 4500 |
001 - CONTROL NUMBER | |
control field | ASIN1402074018 |
003 - CONTROL NUMBER IDENTIFIER | |
control field | OSt |
005 - DATE AND TIME OF LATEST TRANSACTION | |
control field | 20200227135003.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 150306s2003 xxu eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
International Standard Book Number | 1402074018 (hardcover) |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
International Standard Book Number | 9780156029698 (hardcover) |
037 ## - SOURCE OF ACQUISITION | |
Source of stock number/acquisition | Pak Book |
Terms of availability | PKR 1970.10 |
040 ## - CATALOGING SOURCE | |
Transcribing agency | AUMC |
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
Classification number | 621.392 |
100 1# - MAIN ENTRY--PERSONAL NAME | |
Personal name | Bergeron, Janick. |
245 10 - TITLE STATEMENT | |
Title | Writing testbenches : |
Statement of responsibility, etc. | Janick Bergeron. |
260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
Place of publication, distribution, etc. | New Delhi: |
Name of publisher, distributor, etc. | Springer, |
Date of publication, distribution, etc. | 2006. |
300 ## - PHYSICAL DESCRIPTION | |
Extent | xxvi,412 p. ; |
Dimensions | ( R 10, Sh 03) |
520 ## - SUMMARY, ETC. | |
Summary, etc. | mental improvements during the same period. What is clearly needed in verification techniques and technology is the equivalent of a synthesis productivity breakthrough. In the second edition of Writing Testbenches, Bergeron raises the verification level of abstraction by introducing coverage-driven constrained-random transaction-level self-checking testbenches� all made possible through the introduction of hardware verification languages (HVLs), such as e from Verisity and OpenVera from Synopsys. The state-of-art methodologies described in Writing Test� benches will contribute greatly to the much-needed equivalent of a synthesis breakthrough in verification productivity. I not only highly recommend this book, but also I think it should be required reading by anyone involved in design and verification of today's ASIC, SoCs and systems. Harry Foster Chief Architect Verplex Systems, Inc. xviii Writing Testbenches: Functional Verification of HDL Models PREFACE If you survey hardware design groups, you will learn that between 60% and 80% of their effort is now dedicated to verification. |
856 40 - ELECTRONIC LOCATION AND ACCESS | |
Materials specified | Amazon.com |
Uniform Resource Identifier | <a href="http://www.amazon.com/exec/obidos/ASIN/1402074018/chopaconline-20">http://www.amazon.com/exec/obidos/ASIN/1402074018/chopaconline-20</a> |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Source of classification or shelving scheme | Dewey Decimal Classification |
Koha item type | Book |
Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Collection code | Home library | Current library | Shelving location | Date acquired | Total Checkouts | Full call number | Barcode | Date last seen | Price effective from | Koha item type |
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Dewey Decimal Classification | Air University Multan Campus Library | Air University Multan Campus Library | 03/06/2015 | 621.392 | P001064 | 03/06/2015 | 03/06/2015 | Book |