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A practical guide for systemverilog assertions / (Record no. 19275)

MARC details
000 -LEADER
fixed length control field 01964nam a2200241 a 4500
001 - CONTROL NUMBER
control field ASIN0387260498
003 - CONTROL NUMBER IDENTIFIER
control field OSt
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20200227134850.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 150227s2005 xxu eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 0387260498 (hardcover)
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780387260495 (hardcover)
037 ## - SOURCE OF ACQUISITION
Source of stock number/acquisition Pak Book
Terms of availability PKR 1772.10
040 ## - CATALOGING SOURCE
Transcribing agency AUMC
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.392
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Vijayaraghavan, Srikanth.
245 12 - TITLE STATEMENT
Title A practical guide for systemverilog assertions /
Statement of responsibility, etc. Srikanth Vijayaraghavan, Meyyappan Ramanathan.
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication, distribution, etc. New Delhi :
Name of publisher, distributor, etc. Springer,
Date of publication, distribution, etc. 2005.
300 ## - PHYSICAL DESCRIPTION
Extent xxii,334 p. ;
Dimensions ( R 10, Sh 03)
520 ## - SUMMARY, ETC.
Summary, etc. SystemVerilog language consists of three�categories of features�-- Design, Assertions and Testbench.� Assertions add a whole new dimension to the ASIC verification process.���Engineers are used to writing testbenches in verilog that help�verify their design.� Verilog is a procedural language and is very limited in capabilities to handle the complex ASICs built today.� SystemVerilog assertions (SVA) is a declarative language.� The temporal nature of the language provides excellent control over time and allows mulitple processes to execute simultaneously.� This provides the�engineers a very strong tool to solve their verification problems.� The language is still new and the thinking is very different from the�user's perspective when compared to standard verilog language.� There is not enough expertise or intellectual property available as of today in the field.� While the language has been defined very well, there is no practical guide that shows how to use the language to solve real verification problems.� This book is a practical guide that will help people to understand this new language and adopt assertion based verification methodology quickly.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Ramanathan, Meyyappan.
856 40 - ELECTRONIC LOCATION AND ACCESS
Materials specified Amazon.com
Uniform Resource Identifier <a href="http://www.amazon.com/exec/obidos/ASIN/0387260498/chopaconline-20">http://www.amazon.com/exec/obidos/ASIN/0387260498/chopaconline-20</a>
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme Dewey Decimal Classification
Koha item type Book
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Collection code Home library Current library Shelving location Date acquired Total Checkouts Full call number Barcode Date last seen Price effective from Koha item type
    Dewey Decimal Classification       Air University Multan Campus Library Air University Multan Campus Library   02/27/2015   621.392 P000989 02/27/2015 02/27/2015 Book
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